Publications – Journal Articles

 

1.      J. A. Fernández-Zepeda, C. A. C. Flores, A. G. Bourgeois, “Simulating an R-Mesh on an LR-Mesh in Constant Time,” to appear in International Journal of Foundations of Computer Science, (2007).

2.      F. Tan, X. Z. Fu, Y. Q. Zhang, and A. G. Bourgeois, “A Genetic Algorithm-based Feature Subset Selection,” to appear in Soft Computing – A Fusion of Foundations, Methodologies and Applications, (2007).

3.      S. Babvey, A. G. Bourgeois, J. A. Fernández-Zepeda, and S. W. McLaughlin, “Scalable and Efficient Implementations of the LDPC Decoder Using Reconfigurable Models,” International Journal of Foundations of Computer Science, vol. 17, no. 2, (2006), pp. 303-322.

4.      X. Fu, A. G. Bourgeois, P. Fan, and Y. Pan, “Using a Genetic Algorithm Approach to Solve the Dynamic Channel-Assignment Problem,” International Journal of Mobile Communications, vol. 4, issue 3, (2006), pp. 333 – 353.

5.      A. G. Bourgeois, Y. Pan, and S. K. Prasad, “Constant Time Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Bus System,” Journal of Parallel and Distributed Computing, vol. 65, no. 3, (2005), pp. 374-381.

6.      C. Ni, H. Liu, Y. Pan, and A. G. Bourgeois, “An Enhanced Approach to Determine Connected Dominating Sets for Routing in Mobile Ad Hoc Networks,” International Journal of Mobile Communications, vol. 3, issue 3, (2005), pp. 287-302.

7.      J. A. Fernández-Zepeda, A. Estrella-Balderrama, and A. G. Bourgeois, “Designing Fault Tolerant Algorithms for Reconfigurable Meshes,” International Journal of Foundations of Computer Science, vol. 16, no. 1, (2005), pp. 71-89.

8.      J. A. Fernández-Zepeda, D. Fajardo-Delgado, J. A. Cárdenas-Haro, and A. G. Bourgeois, “Efficient Simulation of a Directed Reconfigurable Model on an Undirected Reconfigurable Model,” International Journal of Foundations of Computer Science, vol. 16, no. 1, (2005), pp. 55-70.

9.      A. G. Bourgeois and J. L. Trahan, “Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Optical Bus System,” Parallel Algorithms and Applications, vol. 18, no. 3, (2003), pp. 139-153.

10.  A. G. Bourgeois and J. L. Trahan, “Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses,” International Journal on Foundations of Computer Science, vol. 11, no. 4,  (2000), pp. 553-571.

11.  J. L. Trahan, A. G. Bourgeois, Y. Pan, and R. Vaidyanathan, “Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses,” Journal of Parallel and Distributed Computing, vol. 60, (2000), pp. 1125-1136.

12.  J. L. Trahan, A. G. Bourgeois, and R. Vaidyanathan, “Tighter and Broader Complexity Results for Reconfigurable Models,” Parallel Processing Letters, vol. 8, (1998), pp. 271-282.

 

Publications – Book Chapters

 

13.  A. G. Bourgeois, “Reconfigurable Computing with Optical Buses,” to appear in Handbook of Parallel Computing: Models, Algorithms, and Applications, J. Reif and S. Rajasekaran (eds.), CRC Press (2007).

14.  A. G. Bourgeois, “Fault Resilient Routing Protocols and Dynamic Power Management for Ad Hoc Wireless Networks,” Ad Hoc and Sensor Networks, X. Yang and Y. Pan (eds.), Nova Science Publishers, (2005).

 

Publications – Proceedings (refereed)

 

15.  L. Cheng, A. G. Bourgeois, and X. Zhang, “A Performance Comparison Study of GTS Allocation Schemes in IEEE 802.15.4,” to appear in Proc. International Workshop on Wireless Ad Hoc, Mesh, and Sensor Networks, in conjunction with International Conference on Future Generation Communication and Networking, (Jeju Island, Korea, December 6 – 8, 2007).

16.  L. Cheng, A. G. Bourgeois, and X. Zhang, “A New GTS Allocation Scheme for IEEE 802.15.4 Networks with Improved Bandwidth Utilization,” to appear in Proc. 7th International Symposium on Communications and Information Technologies, (Sydney, Australia, October 16 – 19, 2007).

17.  E. Cho, A. G. Bourgeois, and F. Tan, “An FPGA Design to Achieve Fast and Accurate Results for Molecular Dynamics Simulations,” Proc. 5th International Symposium on Parallel and Distributed Processing and Applications (ISPA), LNCS 4742, (Niagara Falls, Canada, August 29 – 31, 2007), pp. 256-267.

18.  C. Córdova-Flores, J. A. Fernández-Zepeda, and A. G. Bourgeois, “Constant Time Simulation of an R-Mesh on an  LR-Mesh,” Proc. Advances in Parallel and Distributed Computing Models Workshop, in conjunction with the 21st IEEE/ACM International Parallel and Distributed Processing Symposium, (Long Beach, CA, March 26 – March 30, 2007).

19.  L. Cheng and A. G. Bourgeois, “Efficient Channel Reservation for Multicasting GTS Allocation and Pending Addresses in IEEE 802.15.4,” Proc. 3rd International Conference on Wireless and Mobile Communications (ICWMC), (Guadeloupe, French Caribbean, March 4 – 9, 2007), pp. 46.

20.  E. Cho and A. G. Bourgeois, “Multi-level Charge Assignment for Accurate and Efficient Molecular Dynamics (MD) Simulation,” to appear in International Modeling and Simulation Multiconference, 2007.

21.  L. Cheng and A. G. Bourgeois, “Energy Efficiency of Different Data Transmission Methods in IEEE 802.15.4: Study and Improvement,” to appear in International Symposium on Wireless Pervasive Computing (ISWPC), 2007.

22.  K. Nguyen and A. G. Bourgeois, “Ant Colony Optimal Algorithm: Fast Ants on the Optical Pipelined Reconfigurable Mesh,” Proc. 35th International Conference on Parallel Processing, (Columbus, Ohio, August 14-18, 2006), pp. 347-354.

23.  F. Tan, X. Fu, Y. Zhang, and A. G. Bourgeois, “Improving Feature Subset Selection Using Genetic Algorithm for Microarray Gene Expression Data,” Proc. IEEE Congress on Evolutionary Computation in conjunction with IEEE World Congress on Computational Intelligence, (Vancouver, BC, Canada, July 16-21, 2006).

24.  Q. Cheng, Y.-Q. Zhang, N. Hundewale, X.L. Hu, A. Bourgeois and A. Zelikovsky, “Routing Using Messengers in Sparse and Disconnected Mobile Sensor Networks,” Proc. of AWIC2006, (Beer-Sheva, June 5-7, 2006).

25.  F. Tan, X. Fu, H. Wang, Y. Zhang, and A. G. Bourgeois, “A Hybrid Feature Selection Approach for Microarray Gene Expression Data,” International Workshop on Bioinformatics Research and Applications in conjunction with  International Conference on Computational Sciences, (Reading, UK, May 28-31, 2006), pp. 678-685.

26.  L. Cheng and A. G. Bourgeois, “802.15.4 Simulation Module in Network Simulator GTNetS,” Proc. IEEE 63rd Vehicular Technology Conference, (Melbourne, Australia, May 7-10, 2006).

27.  M. Gopalan, A. G. Bourgeois, and J. A. Fernández-Zepeda, “Simulating a PR-Mesh on an LARPBS,” Proc. Advances in Parallel and Distributed Computing Models Workshop, in conjunction with the 20th IEEE/ACM International Parallel and Distributed Processing Symposium, (Rhodes Island, Greece, April 25-29, 2006).

28.  N. Hundewale, Q. Cheng, X. Hu, A. G. Bourgeois, and A. Zelikovsky, “Autonomous Messenger Based Routing in Disjoint Clusters of Mobile Sensor Networks,” Proc. of Agent Directed Simulation, (Huntsville, Alabama, April 2-6, 2006).

29.  S. K. Prasad, A. G. Bourgeois, P. Madiraju, S. Malladi, and J. Balasooriya, “A Methodology for Engineering Collaborative Applications over Mobile Web Objects using SyD Middleware,” Proc. of the 2005 IEEE International Conference on Web Services, (Orlando, Florida, July 11-15, 2005), pp. 489-496.

30.  S. Babvey, A. G. Bourgeois, J. A. Fernández-Zepeda, and S. W. McLaughlin, “A Parallel Implementation of the Message-Passing Decoder of LDPC Codes Using a Reconfigurable Optical Model,” IEEE Proc. 6th ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing, (Towson, Maryland, May 23-25, 2005), pp. 288-293.

31.   L. Cheng, A. G. Bourgeois, and B. H. Yu, “Power Management in Wireless Ad Hoc Networks Using AODV,” IEEE Proc. 1st ACIS Int’l. Workshop on Self Assembling Wireless Networks, in conjunction with 6th ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing, (Townson, Maryland, May 24, 2005), pp. 436-443.

32.  S. Babvey, A. G. Bourgeois, J. A. Fernández-Zepeda, and S. W. McLaughlin, “An Efficient R-Mesh Implementation of LDPC Codes Message-Passing Decoder,” Proc. Advances in Parallel and Distributed Computing Models Workshop, in conjunction with the 19th IEEE/ACM International Parallel and Distributed Processing Symposium, (Denver, Colorado, April 3-8, 2005).

33.  S. K. Prasad, V. Madisetti, S. Navathe, R. Sunderraman, E. Dogdu, A. G. Bourgeois, M. Weeks, B. Liu, J. Balasooriya, A. Hariharan, W. Xie, P. Madiraju, S. Malladi, R. Sivakumar, A. Zelikovsky, Y. Zhang, Y. Pan, and S. Belkasim, “SyD: A Middleware Testbed for Collaborative Applications over Small Heterogeneous Devices and Data Stores,” Proc. of the ACM/IFIP/USENIX 5th International Middleware Conference, (Toronto, Ontario, Canada, October 18-22, 2004), pp. 352-371.

34.  A. Hariharan, S. K. Prasad, A. G. Bourgeois, E. Dogdu, S. Navathe, R. Sunderraman, and Y. Pan, “A Framework for Constraint-based Collaborative Web Service Applications and a Travel Application Case Study,” Proc. International Symposium on  Web Services and Applications, (Las Vegas, Nevada, June 21, 2004), pp. 866-872.

35.  A. Estrella-Balderrama, J.A. Fernández-Zepeda, A. G. Bourgeois, “Fault-Tolerance and Scalability of the Reconfigurable Mesh,” Proc. Advances in Parallel and Distributed Computing Models Workshop, in conjunction with the 18th IEEE/ACM International Parallel and Distributed Processing Symposium, (Santa Fe, New Mexico, April 26-30, 2004).

36.  J.A. Fernández-Zepeda, D. Fajardo-Delgado, J. Cardenas-Haro, and A. G. Bourgeois, “Efficient Simulation of the Acyclic DR-Mesh on the LR-Mesh,” Proc. Advances in Parallel and Distributed Computing Models Workshop, in conjunction with the 18th IEEE/ACM International Parallel and Distributed Processing Symposium, (Santa Fe, New Mexico, April 26-30, 2004).

37.  S. K. Prasad, A. G. Bourgeois, E. Dogdu, R. Sunderraman, Y. Pan, S. Navathe, and V. Madisetti, “Enforcing Interdependencies and Executing Transactions Atomically Over Autonomous Mobile Data Stores Using SyD Link Technology,” Proc. International Workshop on Mobile and Wireless Networks, in conjunction with 23rd IEEE International Conference on Distributed Computing Systems, (Providence, Rhode Island, May 19-22, 2003), pp. 803-809.

38.  X. Fu, Y. Pan, A. G. Bourgeois, and P. Fan, “A Three-Stage Heuristic Combined Genetic Algorithm Strategy to the Channel-Assignment Problem,” Proc. 6th International Workshop on Nature Inspired Distributed Computing, in conjunction with the 17th IEEE/ACM International Parallel and Distributed Processing Symposium,  (Nice, France, April 22-26, 2003).

39.  S. K. Prasad, A. G. Bourgeois, E. Dogdu, R. Sunderraman, Y. Pan, S. Navathe, and V. Madisetti, “Implementation of a Calendar Application Based on SyD Coordination Links,” Proc. 3rd International Workshop on Internet Computing and E-Commerce, in conjunction with the 17th IEEE/ACM International Parallel and Distributed Processing Symposium,  (Nice, France, April 22-26, 2003).

40.  A. G. Bourgeois and J. A. Fernández-Zepeda, “Scalable Algorithms for Faulty R-Meshes,” Proc. 14th IASTED International Conference on Parallel and Distributed Computing and Systems, (Cambridge, Massachusetts, November 4-6, 2002), pp. 542-547.

41.  A. G. Bourgeois and J. L. Trahan, “Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses,” Proc. 14th IEEE/ACM International Parallel and Distributed Processing Symposium, (Cancun, Mexico, May 1-5, 2000), pp. 747-752.

42.  A. G. Bourgeois and J. L. Trahan, “Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Optical Bus System,” Proc. Workshop on Optics and Computer Science, in conjunction with the 14th IEEE/ACM International Parallel and Distributed Processing Symposium, (Cancun, Mexico, May 1-5, 2000), pp. 1044-1052.

43.  J. L. Trahan, A. G. Bourgeois, Y. Pan, and R. Vaidyanathan, “Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses,” Proc. 13th IEEE/ACM International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, (San Juan, Puerto Rico, April 12-16, 1999), pp. 233-237.

44.  J. L. Trahan, Y. Pan, R. Vaidyanathan, and A. G. Bourgeois, “Scalable Basic Algorithms on a Linear Array with a Reconfigurable Pipelined Bus System,” Proc. 10th ISCA International Conf. on Parallel Distributed Computers and Systems, (New Orleans, Louisiana, October 1-3, 1997), pp. 564-569.